| I | cache |
|---|---|
| you | cache |
| he/she/it | caches |
| we | cache |
| you | cache |
| they | cache |
| I | cached |
|---|---|
| you | cached |
| he/she/it | cached |
| we | cached |
| you | cached |
| they | cached |
| I | have | cached |
|---|---|---|
| you | have | cached |
| he/she/it | has | cached |
| we | have | cached |
| you | have | cached |
| they | have | cached |
| I | had | cached |
|---|---|---|
| you | had | cached |
| he/she/it | had | cached |
| we | had | cached |
| you | had | cached |
| they | had | cached |
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Using, for example, a weak hash map, one can store in the cache the various referred objects via a weak reference.
en.wikipedia.org As with other cache coherency protocols, the letters of the protocol name identify the possible states in which a cache line can be.
en.wikipedia.org Atomicity is commonly enforced by mutual exclusion, whether at the hardware level building on a cache coherency protocol, or the software level using semaphores or locks.
en.wikipedia.org To prevent this, every cache controller monitors the bus, listening for broadcasts which may cause it to invalidate its cache line.
en.wikipedia.org A modern microprocessor might have a cache line size of 64 bytes, requiring eight transfers from a 64-bit-wide (8 bytes) memory to fill.
en.wikipedia.org